FRONT DESIGN AND IMPLEMENTATION OF HIGH SPEED HYBRID DUAL D-FIFO-FF (FLIP-FLOP) SYNCHRONIZER USING VERILOG. International Journal of Information Technology and Computer Engineering, [S. l.], v. 7, n. 4, p. 84–98, 2019. Disponível em: https://ijitce.org/index.php/ijitce/article/view/123. Acesso em: 24 jan. 2026.