Designing High Speed 8bit vedic multiplier using Brent Kung Parallel Prefix Adder. International Journal of Information Technology and Computer Engineering, [S. l.], v. 14, n. 1, p. 114–119, 2026. DOI: 10.62647/. Disponível em: https://ijitce.org/index.php/ijitce/article/view/1552. Acesso em: 20 mar. 2026.