A Free and Open Method for Connecting Hardware and Software in Networks

Abstract

As network speeds increase to the tens of Gigabits per second range, it will become more difficult to design packet processing software capable of handling such massive data volumes. As a result, it is clear that there is a need for an appropriate open-source system that may serve as a prototype platform for testing new network capabilities while guaranteeing line-rate processing, precise timestamping, or decreased power usage. All of these needs may be met using hardware-based systems like NetFPGA, rather than only software. The primary barrier to adopting such an open-source FPGA-based solution is the time and effort needed for its creation. With the proliferation of HLL-based circuit synthesis tools, it is now possible to create hardware-based networking apps with a manageable learning curve, in comparison to the usage of HDLs in the past. In this article, we discuss how the new programming paradigm of FPGAs made possible by state-of-the-art High-Level Synthesis tools can feed current open-source hardware-based platforms for networking applications. We contrasted the time and effort required to construct a network flow monitor using conventional hardware development methods with the time and effort required to develop the same thing using High-Level Languages. Initial findings are quite encouraging, especially since the development period has been cut from months to weeks.