Memory Built-in Self Test(MBIST) for ROM

Abstract

The reliability of embedded memory has become a major concern in modern System-on-Chip (SoC) designs, where a significant portion of the silicon area is occupied by memory blocks. Read-Only Memory (ROM), which stores firmware and configuration data, must be thoroughly verified to avoid functional failures after fabrication and during field operation. Conventional memory testing techniques based on external test equipment are costly and unsuitable for at-speed and in-system verification.

This paper presents the design and implementation of a Memory Built-In Self-Test (MBIST) architecture dedicated to ROM. The proposed approach employs a compact on-chip controller, address sequencing logic and a signature analysis unit to verify the correctness of ROM contents without external support. A modified read-only March-based access strategy is adopted, and the read responses are compressed using a Multiple Input Signature Register (MISR). The generated signature is compared with a pre-computed golden signature to determine the pass or fail status of the memory.

The complete architecture is described in VHDL and verified using Xilinx ISE tools. Simulation results confirm correct functionality of the controller, signature generation and pass/fail decision logic. The proposed MBIST scheme offers low hardware overhead, supports at-speed testing and enables periodic in-field diagnostics, making it suitable for reliability-critical embedded systems.